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TECHNICAL DATA
KK74HC620A
Octal 3-State Inverting Bus Transceiver
High-Performance Silicon-Gate CMOS
The KK74HC620A is identical in pinout to the LS/ALS620. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. The KK74HC620A is a 3-state transceiver that is used for 2-way communication between data buses. Two separate enables are available. The enable for bus A to B is active-high, the enable for bus B to A is active-low. * Outputs Directly Interface to CMOS, NMOS, and TTL * Operating Voltage Range: 2.0 to 6.0 V * Low Input Current: 1.0 A * High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION KK74HC620AN Plastic KK74HC620ADW SOIC TA = -55 to 125 C for all packages
PIN ASSIGNMENT LOGIC DIAGRAM
FUNCTION TABLE
Control Inputs PIN 20=VCC PIN 10 = GND Output Enable L Direction L Operation Data Transmitted from Bus B to Bus A (inverted) Data Transmitted from Bus A to Bus B (inverted) Buses Isolated (High Impedance State)
H
H
H L
L H
1
KK74HC620A
MAXIMUM RATINGS*
Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL
*
Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)
Value -0.5 to +7.0 -1.5 to VCC +1.5 -0.5 to VCC +0.5 20 35 75 750 500 -65 to +150 260
Unit V V V mA mA mA mW C C
Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/C from 65 to 125C SOIC Package: : - 7 mW/C from 65 to 125C
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VIN, VOUT TA tr, tf Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Input Rise and Fall Time (Figure 1) VCC =2.0 V VCC =4.5 V VCC =6.0 V Min 2.0 0 -55 0 0 0 Max 6.0 VCC +125 1000 500 400 Unit V V C ns
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. I/O pins must be connected to a properly terminated line or bus.
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KK74HC620A
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
VCC Symbol Parameter Test Conditions V Guaranteed Limit 25 C to -55C 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 3.98 5.48 0.1 0.1 0.1 0.26 0.26 0.1 0.5 85 C 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 3.84 5.34 0.1 0.1 0.1 0.33 0.33 1.0 5.0 125 C 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 3.7 5.2 0.1 0.1 0.1 0.4 0.4 1.0 10 A A V Unit
VIH
Minimum HighLevel Input Voltage Maximum Low Level Input Voltage Minimum HighLevel Output Voltage
VOUT=0.1 V or VCC-0.1 V IOUT 20 A VOUT=0.1 V or VCC-0.1 V IOUT 20 A VIN=VIH or VIL IOUT 20 A VIN=VIH or VIL IOUT 6.0 mA IOUT 7.8 mA
2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 6.0 6.0
V
VIL
V
VOH
V
VOL
Maximum LowLevel Output Voltage
VIN= VIL or VIH IOUT 20 A VIN= VIL or VIH IOUT 6.0 mA IOUT 7.8 mA
IIN IOZ
Maximum Input Leakage Current Maximum ThreeState Leakage Current
VIN=VCC or GND, Pin 1 or 19 Output in High-Impedance State VIN= VIL or VIH VOUT=VCC or GND, I/O Pins VIN=VCC or GND IOUT=0A
ICC
Maximum Quiescent Supply Current (per Package)
6.0
8.0
80
160
A
3
KK74HC620A
AC ELECTRICAL CHARACTERISTICS (CL=50pF,Input tr=tf=6.0 ns)
VCC Symbol Parameter V Guaranteed Limit 25 C to -55C 100 20 17 150 30 26 150 30 26 60 12 10 10 15 85C 125C Unit
tPLH, tPHL
Maximum Propagation Delay, A to B , B to A (Figures 1 and 3) Maximum Propagation Delay , Direction or Output Enable to A or B (Figures 2 and 4) Maximum Propagation Delay , Direction or Output Enable to A or B (Figures 2 and 4) Maximum Output Transition Time, Any Output (Figures 1 and 3) Maximum Input Capacitance (Pin 1 or Pin 19) Maximum Three-State I/O Capacitance (I/O in High-Impedance State) Power Dissipation Capacitance (Per Transceiver Channel)
2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 -
125 35 21 190 38 33 190 38 33 75 15 13 10 15
150 30 26 225 45 38 225 45 38 90 18 15 10 15
ns
tPLZ, tPHZ
ns
tPZL, tPZH
ns
tTLH, tTHL
ns
CIN COUT
pF pF
Typical @25C,VCC=5.0 V 40 pF
CPD
Used to determine the no-load dynamic power consumption: PD=CPDVCC2f+ICCVCC
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
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KK74HC620A
Figure 3. Test Circuit
Figure 4. Test Circuit
EXPANDED LOGIC DIAGRAM
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KK74HC620A
N SUFFIX PLASTIC DIP (MS - 001AD)
A
Dimension, mm
20 11 B 1 10
Symbol A B C
MIN 24.89 6.1
MAX 26.92 7.11 5.33
F
L
D F
0.36 1.14 2.54 7.62 0 2.92 7.62 0.2 0.38
0.56 1.78
C -T- SEATING
PLANE
G H
H J
N G D 0.25 (0.010) M T K M
J K L M N
10 3.81 8.26 0.36
NOTES:
1. Dimensions "A", "B" do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side.
D SUFFIX SOIC (MS - 013AC)
A 20 11
Dimension, mm Symbol MIN 12.6 7.4 2.35 0.33 0.4 1.27 9.53 0 0.1 0.23 10 0.25 8 0.3 0.32 10.65 0.75 MAX 13 7.6 2.65 0.51 1.27
H
B
P
A B
1
G
10 C R x 45
C D F
-TD 0.25 (0.010) M T C M K
SEATING PLANE
J
F
M
G H J K M P R
NOTES: 1. Dimensions A and B do not include mold flash or protrusion. 2. Maximum mold flash or protrusion 0.15 mm (0.006) per side for A; for B 0.25 mm (0.010) per side.
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